riscv-collab/riscv-openocd

Issues

• Multi-die RISC-V core configuration file

  #1166 opened 5 days ago by zhangdujiao
  1

• Why memory read speed is much slower than memory write speed？

  #1164 opened 6 days ago by lz-bro
  2

• Issues for write memory progbuf handle busy

  #1159 opened 7 days ago by lz-bro
  12

• Does OpenOCD have any plans to support RISC-V trace?

  #1158 opened 14 days ago by zhangdujiao
  12

• openocd not honouring watchpoint hit time (before/after) in mcontrol6

  #1155 opened 22 days ago by RaamyPi
  1

• "riscv set_dm_baseaddr" command is not shown in User's Guide

  #1153 opened a month ago by zhangdujiao
  11

• Clean up/cull stale branches?

  #1051 opened 7 months ago by TommyMurphyTM1234
  4

• Support for adding data watchpoints

  #1151 opened a month ago by RaamyPi
  11

• Drop the use of `-coreid` in RISC-V targets

  #1147 opened a month ago by en-sc
  6

• openOCD issue : failed to read misa

  #1145 opened a month ago by abhiram-padikkat
  9

• Unable to halt Hart 992

  #1143 opened 2 months ago by RenatoBelmonte
  6

• riscv013 Invalidate cache function does not invalidate complete progbuf-cache (off by one error?)

  #1139 opened 2 months ago by MountaineerGit
  6

• How to enable sba read and write access instead of using program buffer

  #1138 opened 2 months ago by DecodeTheEncoded
  2

• Update `RISCV_SCAN_DELAY_MAX` to `UINT_MAX`

  #1137 opened 2 months ago by en-sc
  0

• How to program multiple cores using Openocd ?

  #1110 opened 2 months ago by rtspk
  5

• Create a wrapper for Spike to test BSCAN-related functionality

  #1126 opened 2 months ago by en-sc
  0

• read_memory_bus_v1 does not work properly for sizes greater than 4

  #1107 opened 3 months ago by aap-sc
  1

• How can a config support two types of tap configuration

  #1119 opened 3 months ago by lz-bro
  4

• enable "-rtos hwthread"-capable platforms in OpenOCD CI testing.

  #1120 opened 3 months ago by aap-sc
  0

• Autoconf version not recognized

  #1117 opened 3 months ago by pcotret
  5

• Invalided cache for breakpoints

  #1113 opened 3 months ago by oferShinaar
  5

• There are cases when WPs disabled by `disable_triggers()` can not be re-enabled by `enable_triggers()`.

  #1108 opened 3 months ago by en-sc
  2

• Some header guards do not comply to style guide

  #1097 opened 3 months ago by en-sc
  0

• openocd only supports Debug Module version 2 (0.13) and 3 (1.0), not 0 (dmstatus=0x0). This error might be caused by a JTAG signal issue. Try reducing the JTAG clock speed

  #1106 opened 4 months ago by UmeshChandargi
  12

• All `targets/RISC-V/spike32.py` tests failing

  #1098 opened 4 months ago by TommyMurphyTM1234
  6

• `read_memory_bus_v1()` is broken

  #1080 opened 4 months ago by en-sc
  1

• Unnecessary calls to `select_dmi()`

  #1092 opened 5 months ago by en-sc
  0

• Random/sporadic failures running test suite interactively against Spike

  #1049 opened 7 months ago by TommyMurphyTM1234
  45

• progbuf issue

  #1088 opened 5 months ago by stineje
  7

• RISC-V v0.11: Writes to register `x0` (`zero`) should not be cached.

  #1086 opened 5 months ago by en-sc
  0

• how to read v register if vslide1down instruction not present

  #1069 opened 5 months ago by fanghuaqi
  19

• The method of burning program to SoC: PB, SBA, AC in external debug

  #1057 opened 5 months ago by zhangdujiao
  5

• Investigate the semantics of step/resume operations in context of HW trigger state.

  #1079 opened 6 months ago by aap-sc
  0

• How can I build openocd with static libs?

  #1078 opened 6 months ago by gushi84
  13

• Implement controls to adjust OpenOCD behavior during when it tries to detect which watch point was hit (riscv_hit_watchpoint)

  #1076 opened 6 months ago by aap-sc
  0

• Cache information about abstract access availability on per-register basis

  #1074 opened 6 months ago by JanMatCodasip
  0

• Issues Flashing Baremetal Applications Directly with OpenOCD on MPFS

  #1071 opened 6 months ago by abelixrev
  2

• Using the `info reg all` command within gdb returns an `remote failure reply 'E0E'`

  #1070 opened 6 months ago by Alan-19950616
  10

• [riscv.cpu] Debug Module did not become active. dmcontrol=0x0

  #1060 opened 7 months ago by l1onog
  8

• Tracking RISC-V Debug Spec v0.11 testing

  #1063 opened 7 months ago by en-sc
  5

• Q extension support

  #1068 opened 6 months ago by en-sc
  3

• load_image returns error 'invalid command'

  #1067 opened 6 months ago by Stycore
  6

• Failed to write to memory, connecting to spike

  #1066 opened 6 months ago by TimMThomas
  7

• Improve stability of riscv-tests for targets with low remotetimeout value

  #1065 opened 7 months ago by aap-sc
  5

• The OpenOCD service cannot be killed by kill-9

  #1059 opened 7 months ago by liushuai05
  11

• `lt` trigger is not always available

  #1062 opened 7 months ago by en-sc
  0

• Incorrect "valid" read of `menvcfg` CSR from HiFive1 board

  #1058 opened 7 months ago by TommyMurphyTM1234
  7

• Multiple warnings/deprecation notices triggered by GitHub Actions

  #1048 opened 7 months ago by TommyMurphyTM1234
  2

• mcontrol6.timing bit is set

  #1053 opened 7 months ago by JAYANTH-IITM
  4

• Use "riscv set_ir dtmcs 0x20000" command can't trigger dmihardreset?

  #1052 opened 7 months ago by Alan-19950616
  8