Allow multiple `endloop` packets per loop instruction
Rot127 opened this issue · 0 comments
Rot127 commented
Multiple endloop packets can belong to a single loop instruction.
Example:
Currently the jump address of each endloop packet after the first one are set to 0x0. Therefore the analysis has errors.
The fix should be fairly simple. Just not set the static variables of loop starts to 0x0 once an endloop instruction is disasssembled.
See cases in hexagon_disas.c::hexagon_disasm_instruction().
Prerequisite: rizinorg/rizin#2073 should be merged.