rust-embedded/cortex-m

enable_icache not available on STM32G0x0

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kpfleming commented

According to the RM for these devices, icache is available for 2 cache lines of 64 bits each. (Additionally there is a prefetch mode for a small number of instructions).

However, the enable_icache function in the SCB struct is only available for devices that are not armv6m, which is the target used for these devices.

kpfleming commented

Never mind... the icache is part of the flash peripheral on these chips, not the CPU core.