Implement multi-core support

[Disasm]

In order to support FU540 SoC we need to do something with multiple harts running the same code.
There are several problems on the way:

• You can't run the same initialization code multiple times (especially r0::zero_bss and r0::init_data)
• You need to decide which hart will be "main"
  • For M-mode we can just choose hart 0 as it's always present
  • For S-mode the situation is tricky: you may not have hart 0, but you can use atomics for this.
• You need to decide what to do with the rest of the harts. Thay can be parked, but you need a way to unpark them.
• You need to allocate stack region for all of the harts. With multiple harts the situation is a bit complicated: you need to know stack size in advance. This stack size can depend on the main application and it's resource usage.

My proposition is the following:

• Add support for just M-mode for now, use hart 0 as the "main" hart.
• Parked harts will busy-wait for a non-zero value of some flag.
• Harts will be unparked all at once (for simplicity) with a function call (start_other_harts?).
• Allocate stack for the other harts upon unparking: pass stack size as an argument.
• After unparking harts will execute the same code as hart 0 except for main-hart-related initialization. In user application these harts can be distinguished by hart id and parked/unparked again (with CLINT signalling mechanism, for example) if necessary.

@rust-embedded/riscv Any ideas?