ICR management question
berkus opened this issue · 0 comments
berkus commented
PL011 documentation on ICR states:
On a write of 1, the corresponding interrupt is cleared. A write of 0 has no effect.
The code in pl011 uart states:
// Clear all pending interrupts.
self.registers.ICR.write(ICR::ALL::CLEAR);
ALL::CLEAR makes all bits 0, achieving a no-op.
Did I miss anything?