serial: implement TX FIFO
Closed this issue · 2 comments
Our serial console implements only one FIFO (the RX one).
We need to implement the TX FIFO as well because otherwise it is hard to follow the specification. Not implementing this fifo has the following side effect - we are flooding the guest with interrupts. In non-FIFO mode, an interrupt will be generated when the THR gets empty (therefore, for each received byte). In FIFO mode the interrupt is sent when the TX FIFO gets completely empty (every FIFO_SIZE bytes).
A 16550 spec example here. It is worth mentioning, the spec defines the FIFO_SIZE as 16 bytes for UART 16550(A). However, it can be for example 64 bytes as well, as it can be seen here.
Can I have this please?
Closing this. For more details, please check the PR: #28 (comment)