sathvikswaminathan

sathvikswaminathan's Stars

• exaloop/codon

  A high-performance, zero-overhead, extensible Python compiler using LLVM

  Language:C++15.2k137423521

• garrettj403/SciencePlots

  Matplotlib styles for scientific plotting

  Language:Python7.2k6295714

• MattPD/cpplinks

  A categorized list of C++ resources.

  4.6k26111485

• dendibakh/perf-ninja

  This is an online course where you can learn and master the skill of low-level performance analysis and tuning.

  Language:C++2.6k11138227

• martinezjavier/ldd3

  Linux Device Drivers 3 examples updated to work in recent kernels

  Language:C2.4k16639912

• jbmouret/matplotlib_for_papers

  Handout for the tutorial "Creating publication-quality figures with matplotlib"

  Language:Jupyter Notebook2.1k727300

• shaily99/advice

  A repository of links with advice related to grad school applications, research, phd etc

  2.1k371203

• killiansheriff/LovelyPlots

  Matplotlib style sheets to nicely format figures for scientific papers, thesis and presentations while keeping them fully editable in Adobe Illustrator.

  Language:Python8505435

• CMU-SAFARI/ramulator

  A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the IEEE CAL 2015 paper by Kim et al. at http://users.ece.cmu.edu/~omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf

  Language:C++5906199210

• ChampSim/ChampSim

  ChampSim is an open-source trace based simulator maintained at Texas A&M University and through the support of the computer architecture community.

  Language:C++52524214438

• riscv/sail-riscv

  Sail RISC-V model

  Language:Coq46745240169

• ssvb/tinymembench

  Simple benchmark for memory throughput and latency

  Language:C358301696

• jitinnair1/gradfolio

  responsive, dark-mode ready Jekyll theme designed for use as a personal website and portfolio

  Language:SCSS24411185

• ParAlg/gbbs

  GBBS: Graph Based Benchmark Suite

  Language:C++197131758

• akhin/microarchitecture-cheatsheet

  X86 CPU topics overview for developers , oriented towards performance

  193648

• Kyle-Kyle/top4grep

  find relevant security papers published in the top-4 conferences (S&P, USENIX, CCS, NDSS)

  Language:Python1691417

• IAIK/flush_flush

  This repository contains examples of Flush+Flush cache attacks

  Language:C154251154

• FPSG-UIUC/lotr

  Source code of the paper "Lord of the Ring(s): Side Channel Attacks on the CPU On-Chip Ring Interconnect Are Practical"

  Language:C1397012

• fwsGonzo/bigassm

  Assemble 128-bit RISC-V

  Language:C++44754

• cserl-iitb/bootcamp2022

  The repo for all content related to Bootcamp 2022.

  Language:C398070

• rsnikhil/RISCV_ISA_Spec_Tour

  Tutorial tour of the RISC-V ISA Spec (expressed in SAIL ISA spec language)

  Language:HTML35604

• conference-websites/acmart-sigproc-template

  New template for ACM Conferences (acmart / sigconf)

  Language:TeX253236

• CMU-SAFARI/BlockHammer

  Source code for the cycle-level simulator and RTL implementation of BlockHammer proposed in our HPCA 2021 paper: Yaglikci et. al., "BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows" at https://people.inf.ethz.ch/omutlu/pub/BlockHammer_preventing-DRAM-rowhammer-at-low-cost_hpca21.pdf

  Language:C++17501

• 0xADE1A1DE/CacheFX

  Language:C++9208

• ricpacca/deaddrop

  Chat client on an LLC covert channel

  Language:C7545

• Anish-Saxena/aqua_rowhammer_mitigation

  AQUA (IEEE MICRO 2022) Artifact

  Language:C++5204

• rshnn/covert

  Implementation of L3 cache (LLC) covert text channel exploit

  Language:C++4203

• SamKG/Flush-Reload-Sidechannel

  A demonstration of a sidechannel vulnerability that exploits cache timings using Flush Reload to communicate information over a covert channel

  Language:C++4201

• stormeuh/llvm-project

  Fork of LLVM adding CHERI support

  2

• stormeuh/sail-cheri-riscv

  CHERI-RISC-V model written in Sail

  Language:Isabelle1