bt broken
Closed this issue · 4 comments
brandonros commented
{
"i": 141,
"x64dbgLine": {
"rawLine": {
"Index": "0008D",
"Address": "0000000144EDDDB3",
"Bytes": "4D:0FA3EA",
"Disassembly": "bt r10,r13",
"Registers": "",
"Memory": "",
"Comments": ""
},
"rip": "144edddb3",
"registerChanges": [],
"memoryChanges": []
},
"scemuLine": {
"rawLine": "diff_reg: rip = 144edddb3 r10 7ffe0002 -> 7ffe0003;",
"rip": "144edddb3",
"registerChanges": [
{
"registerName": "r10",
"previousValue": "7ffe0002",
"newValue": "7ffe0003"
}
],
"memoryChanges": []
},
"instructionErrors": [
{
"index": 0,
"message": "unmatchedRegisterChange mismatch (scemu but not x64dbg)",
"scemu": "r10"
}
]
},
brandonros commented
142 0x144edddb3: bt r10,r13
diff_flags: rip = 144edddb3
diff_reg: rip = 144edddb3 r10 7ffe0002 -> 7ffe0003;
rax: 0x58 rbx: 0x0 rcx: 0x140000000 rdx: 0x100000000 rsi: 0x14f418 rdi: 0x144e47255 rbp: 0x144ed4239 rsp: 0x14f290
r8: 0x0 r9: 0x0 r10: 0x7ffe0003 r11: 0x1bb09de77 r12: 0x1448a76a4 r13: 0x0 r14: 0x140000000 r15: 0x0
sha0coder commented
current logic:
let mut bit = match self.get_operand_value(&ins, 1, true) {
Some(v) => v,
None => return,
};
let value = match self.get_operand_value(&ins, 0, true) {
Some(v) => v,
None => return,
};
if bit >= 64 {
bit = 63;
}
self.flags.f_cf = (value & (1 << bit)) == 1;
let mut result = value;
set_bit!(result, bit, !self.flags.f_cf as u8);
if !self.set_operand_value(&ins, 0, result) {
return;
}
sha0coder commented
"Store selected bit in CF flag." this seems ok
i have to check the !f_cf as u8
brandonros commented
fixed