bsr cf flag broken

[brandonros]

 {
    "i": 313,
    "x64dbgLine": {
      "rawLine": {
        "Index": "00139",
        "Address": "0000000144F4B8B4",
        "Bytes": "41:80D2 7F",
        "Disassembly": "adc r10b,7F",
        "Registers": "r10: 0-> 7F",
        "Memory": "",
        "Comments": ""
      },
      "rip": "144f4b8b4",
      "registerChanges": [
        {
          "registerName": "r10",
          "previousValue": "0",
          "newValue": "7f"
        }
      ],
      "memoryChanges": []
    },
    "scemuLine": {
      "rawLine": "diff_reg: rip = 144f4b8b4 r10 0 -> 80;",
      "rip": "144f4b8b4",
      "registerChanges": [
        {
          "registerName": "r10",
          "previousValue": "0",
          "newValue": "80"
        }
      ],
      "memoryChanges": []
    },
    "instructionErrors": [
      {
        "index": 0,
        "message": "newValue mismatch",
        "x64dbg": "7f",
        "scemu": "80"
      }
    ]
  },

[brandonros]

we have cf set to 1 here:

  diff_flags: rip = 144f4b8a8 f_cf 0 -> 1; 

[sha0coder]

ok the result of ADC is bad because the carry was bad before,

310 0x144f4b8a8: bsr r10d,ebp

--- console ---
=>r r10
r10: 0xdb 219
=>r ebp
ebp: 0x44f4b853
=>
310 0x144f4b8a8: bsr r10d,ebp
=>r r10
r10: 0x1e 30
=>f
--- flags ---
cf: true
pf: true

is doing

                   if dest != sz as u64 {
                        self.flags.f_cf = true;
                    } else {
                        self.flags.f_cf = false;
                    }

[sha0coder]

On BSR the CF, OF, SF, AF, and PF flags are undefined.
I'm going to comment those lines.

[sha0coder]

fixed.