bsf weirdness

[brandonros]

{
    "i": 2993,
    "iHex": "bb1",
    "x64dbgLine": {
      "rawLine": {
        "Index": "00BB1",
        "Address": "000000014501BC20",
        "Bytes": "45:0FBCDF",
        "Disassembly": "bsf r11d,r15d",
        "Registers": "",
        "Memory": "",
        "Comments": ""
      },
      "rip": "14501bc20",
      "registerChanges": [],
      "memoryChanges": []
    },
    "scemuLine": {
      "rawLine": {
        "diffRegLine": "diff_reg: pos = 2993 rip = 14501bc20 r11 9d46c36de8c10d85 -> e8c10d85;",
        "memTraceLines": [
          {
            "rawLine": "mem_trace: pos = 2993 rip = 14501bc1d op = write bits = 32 address = 0x14f288 value = 0xe8c199fa name = 'stack'",
            "position": "bb1",
            "rip": "14501bc1d",
            "operation": "write",
            "bits": "20",
            "address": "14f288",
            "value": "e8c199fa"
          }
        ]
      },
      "position": "bb1",
      "rip": "14501bc20",
      "registerChanges": [
        {
          "registerName": "r11",
          "previousValue": "9d46c36de8c10d85",
          "newValue": "e8c10d85"
        }
      ],
      "memoryChanges": [
        {
          "address": "14f288",
          "previousValue": 0,
          "newValue": "e8c199fa"
        }
      ]
    },
    "instructionErrors": [
      {
        "index": 0,
        "message": "unmatchedRegisterChange mismatch (scemu but not x64dbg)",
        "scemu": "r11"
      }
    ]
  },

[brandonros]

looks like it should be a no-op

r11d = 00000000E8C10D85, r15d = 0000000000000000
bsf r11d,r15d

[sha0coder]

but bsf is inline:

let (result, new_flags) = inline::bsf(value0, value1, sz, self.flags.dump());
self.flags.load(new_flags);

[brandonros]

it is probably one of those cases again where inline is not doing lower/upper 32-bit correct i think? any way to hardcode force it to bsf r11d, r15d?

[sha0coder]

yes it's undefined because r15d is zero.

IF SRC = 0
    THEN
        ZF := 1;
        DEST is undefined;

[sha0coder]

UB implemented, if src = 0 -> result = dst