sha0coder/scemu

shrd ax, sp, D4 broken

Closed this issue · 2 comments

{
    "i": 32,
    "x64dbgLine": {
      "rawLine": {
        "Index": "00020",
        "Address": "0000000144FF954F",
        "Bytes": "66:0FACE0 D4",
        "Disassembly": "shrd ax,sp,D4",
        "Registers": "rax: 1448A76A4-> 1448A4F43",
        "Memory": "",
        "Comments": ""
      },
      "rip": "144ff954f",
      "registerChanges": [
        {
          "registerName": "rax",
          "previousValue": "1448a76a4",
          "newValue": "1448a4f43"
        }
      ],
      "memoryChanges": []
    },
    "scemuLine": {
      "rawLine": "diff_reg: rip = 144ff954f",
      "rip": "144ff954f",
      "registerChanges": [],
      "memoryChanges": []
    },
    "instructionErrors": [
      {
        "index": 0,
        "message": "unmatchedRegisterChange mismatch (x64dbg but not scemu)",
        "x64dbg": "rax"
      }
    ]
  },

shrd with counter(0xd4) > regsize(16) is undefined behavior.

33 0x144ff954f: shrd ax,sp,0D4h
/!\ SHRD undefined behaviour

I have to study it.

the unique shrd shld that don't pass the --test are the undefined ones.

--- console ---
=>r ax
command not found, type h
=>r rax
        rax: 0x1448a76a4 5444892324 'h:k' (DTS9_PatcherV.jPc2)
=>r rsp
        rsp: 0x14f430
=>
33 0x144ff954f: shrd  ax,sp,0D4h
thread 'main' panicked at 'SHRD 0x76a should be 0x4f43',

in case of 16bits internally the processor doesn't does the module because would be the same as param 4 that gives different result.
counter: 0x0D4 % 16 = 4

my processor match with yours, should be 0x4f43