Issues
- 34
DiPho casing
#21 opened by szymons90 - 21
DiPho v2 Ethernet implementation
#18 opened by gkasprow - 12
DiPho v2 ready for review
#19 opened by pm-daniel - 1
DiPho_AFE v1.0 issues
#17 opened by pm-daniel - 5
DiPho_digital v1.0 issues
#16 opened by pm-daniel - 1
- 2
[RFC] TIA Simulations
#3 opened by pm-daniel - 123
[RFC] Digital monitoring photodiodes
#1 opened by airwoodix - 25
PCB review
#10 opened by gkasprow - 1
correct me if I'm wrong - the CAL_DIV_OUT signal is used to estimate U3 resistance?
#14 opened by pm-daniel - 0
can VBAT be leaft floating?
#15 opened by pm-daniel - 3
check if the Ethernet connector with magnetics used in Stabilizer/Thermostat can be reused here
#12 opened by pm-daniel - 2
wouldn't it be better to use SPI bus between MCU and Ethernet chip? TCP/IP stacks usually use such interface because it works with DMA. This STM can't expose internal parallel data (EMIF) bus via IO pins. This means that each IO transfer would have to be done in SW which will add a lot of overhead. Just look how stacks handle external Ethernet PHYs
#11 opened by pm-daniel - 1
- 1
[sch rev] [digital] missing pu resistors
#6 opened by filipswit - 1
[sch rev] [digital] B2B connector
#7 opened by filipswit - 1
[sch rev] [analog] opamps
#9 opened by filipswit - 1
- 1
[sch rev] [analog] incomplete variants
#8 opened by filipswit - 5
[RFC] Other front end boards
#2 opened by dtcallcock