length matching

[filipswit]

• QSPI should be length matched
  UG583 : PCB and package delay skew for I/O[3:0] and SS lines relative to CLK should be within ±50 ps.

• ULPI should be length matched
  UG583: PCB and package delay skews for DATA[7:0]/DIR/NXT/STP and CLK should be within ±100 ps
  So it should meet requirements, but please add rule.

• RGMII should be length matched
  UG583: Delay skew for TXD/RXD[3:0] and CTL to clock delay should be within ±50 ps including package time.

[tprzywoz]

done