Compatibility issue with Xilinx ISE 10.1

[moloned]

In the module port listings for module raycast_core_idx and raycast_master the last ports in the lists had trailing commas which caused an error in ISE 10.1 under Ubuntu 11.0 (I'm using this configuration with an older Digilentinc XUPV2P Virtex II Pro board I had lying around)

Commenting out the commas out fixes the problem

============================ modified RTL ============================

// TODO: Make far ptr relative to root

`include "raycast_defines.v"

module raycast_master
(

    // WB Master
   m_wb_adr_o, m_wb_sel_o, m_wb_we_o,
   m_wb_dat_o, m_wb_dat_i, m_wb_cyc_o,
   m_wb_stb_o, m_wb_ack_i, m_wb_err_i,
   m_wb_cti_o, m_wb_bte_o,

    // Controller i/o
    ctrl_wb_adr_i, ctrl_wb_sel_i, ctrl_wb_we_i,
    ctrl_wb_dat_o, ctrl_wb_dat_i, ctrl_wb_cyc_i,
    ctrl_wb_stb_i, ctrl_wb_ack_o,
    ctrl_wb_cti_i, ctrl_wb_bte_i,

    // Core i/o

ifdef CORE0 c0_wb_adr_i, c0_wb_dat_o, c0_wb_cyc_i, c0_wb_stb_i, c0_wb_ack_o, endif
ifdef CORE1 c1_wb_adr_i, c1_wb_dat_o, c1_wb_cyc_i, c1_wb_stb_i, c1_wb_ack_o, endif
ifdef CORE2 c2_wb_adr_i, c2_wb_dat_o, c2_wb_cyc_i, c2_wb_stb_i, c2_wb_ack_o, endif
ifdef CORE3 c3_wb_adr_i, c3_wb_dat_o, c3_wb_cyc_i, c3_wb_stb_i, c3_wb_ack_o, endif

    wb_clk, wb_rst //,

);

module raycast_core_idx
(
is_first_i, idx_i,
txm_i, tym_i, tzm_i,
t_enter_i,
exit_plane_child_i,

    idx_next_o,
    is_exit_o //,
);