distribured AxiDualPortRam latency wrong
Closed this issue · 1 comments
jmdewart commented
AxiDualPortRam distributed latency issue when setting READ_LATENCY_G = 2. Actual latency ends up being 1, probably because there is no DOB_REG
https://github.com/slaclab/surf/blob/master/axi/axi-lite/rtl/AxiDualPortRam.vhd#L189-L190