sourabh-suri
Electrical Engineer to undertake challenging projects to meet the design and development needs.
Indian Institute of Technology, BombayDelhi
Pinned Repositories
16x16-bit-Dada-multiplication
Design a Dadda multiplier for unsigned 16x16 bit multiplication with a Brent Kung adder for the final addition in synthesizable VHDL.
32-bit-Brent-Kung-architecture
Brent Kung architecture for adding 32 bit operands.
6-Pulse-Converter-using-Simulink
Three-phase Graetz bridge rectifier or six-pulse bridge with switching control circuit to study sending end of HVDC Link.
Code-Conversions-in-Assembly
This repo contains four conversion codes as follows: An ALP to convert decimal number to its equivalent hexadecimal number. Input Register is R0, Output Register is R1. An ALP to convert hexadecimal number to its equivalent decimal number. Input Register is R0, Output Register is R2. An ALP to convert decimal number to its equivalent ASCII code. Input Register is R1. An ALP to convert BCD to its equivalent ASCII code. Input Register is R0.
High-Power-Converters
Home-Equipment-Profiling
An embeded system with a user friendly GUI, web page hosted over server. Optimize the intensity of a LED light fixature with logarithmic variation of light Controlling the speed of fan for a particular work station.
K-means-Clustering
Pan-Card-OCR
Classification of KYC documents and OCR extraction
sourabh-suri.github.io
My Portfolio
Sudoku-Solver
A brute force algorithm on hardware is used to solve a sudoku. When a valid fill is not found backtracking is done. Backtracking is repeated until last number is a valid guess i.e guess out of 1 to 9. Digital logic realised using priority encoders and multiplexers.
sourabh-suri's Repositories
sourabh-suri/Pan-Card-OCR
Classification of KYC documents and OCR extraction
sourabh-suri/Sudoku-Solver
A brute force algorithm on hardware is used to solve a sudoku. When a valid fill is not found backtracking is done. Backtracking is repeated until last number is a valid guess i.e guess out of 1 to 9. Digital logic realised using priority encoders and multiplexers.
sourabh-suri/sourabh-suri.github.io
My Portfolio
sourabh-suri/16x16-bit-Dada-multiplication
Design a Dadda multiplier for unsigned 16x16 bit multiplication with a Brent Kung adder for the final addition in synthesizable VHDL.
sourabh-suri/32-bit-Brent-Kung-architecture
Brent Kung architecture for adding 32 bit operands.
sourabh-suri/Home-Equipment-Profiling
An embeded system with a user friendly GUI, web page hosted over server. Optimize the intensity of a LED light fixature with logarithmic variation of light Controlling the speed of fan for a particular work station.
sourabh-suri/6-Pulse-Converter-using-Simulink
Three-phase Graetz bridge rectifier or six-pulse bridge with switching control circuit to study sending end of HVDC Link.
sourabh-suri/Code-Conversions-in-Assembly
This repo contains four conversion codes as follows: An ALP to convert decimal number to its equivalent hexadecimal number. Input Register is R0, Output Register is R1. An ALP to convert hexadecimal number to its equivalent decimal number. Input Register is R0, Output Register is R2. An ALP to convert decimal number to its equivalent ASCII code. Input Register is R1. An ALP to convert BCD to its equivalent ASCII code. Input Register is R0.
sourabh-suri/High-Power-Converters
sourabh-suri/Money-Order
An Android App 💲 that is capable of doing OFFLINE PAYMENT transactions.
sourabh-suri/Attrition-Classification
sourabh-suri/Monopolar-HVDC-Link
Monopolar HVDC Link Line Calculations for sending and receiving end voltage and power with power factor
sourabh-suri/PLL-for-50Hz
sourabh-suri/Power-Electronics-and-Power-Systems-Lab-Project
sourabh-suri/Power-Spectrum-of-a-Signal
A MATLAB PROGRAM FOR DETERMINATION OF POWER SPECTRUM OF A GIVEN SEQUENCE
sourabh-suri/VLSI-Logical-Effort-
sourabh-suri/WWE-Tapout
Two Players Agility Fighting :men_wrestling: WWE Game.
sourabh-suri/Arithmetic-Operation-in-Assembly
An Assembly Language Program to add, subtract & multiply, division of two 8 bit numbers. Numbers are in Register in R1 & R2. Result of addition in register in R0, subtraction in R3, borrow if any in R4, Result of multiplication in Register R5 & R6, & Result of division, quotient in R7, Remainder in R0 of RB1.
sourabh-suri/Bubble-Sorting-in-Assembly
An Assembly Language Program to sort a given array present in external memory with a starting address 9000h and size of an array is 10h using bubble sort technique.
sourabh-suri/Factorial-Operation-in-Assembly
A few random unsigned integers are stored from the internal data memory location 31H onwards. Number of term (N) is available in location 30H. Assuming that none of these numbers is greater than 5, hence an ALP to find the factorials of these integers and then find their sum. Assuming that the sum would not exceed 8-bit value.
sourabh-suri/Finding-Largest-Element-in-an-Array-using-Assembly
An ALP to find largest elements in a given array present in external memory with a starting address 9000h and size of array is 10.
sourabh-suri/Decimation-Process-using-MATLAB-code
A PROGRAM TO IMPLEMENT THE DECIMATION PROCESS IN MATLAB PROGRAM
sourabh-suri/Digital-Counters-in-Assembly-Code
An ALP to illustrate hexadecimal up counter, hexadecimal down counter, decimal up counter & decimal down counter with a given starting and ending value. Starting Range is 00H, Ending Range is 0FFH, Register used R0, R1, R3, R6.
sourabh-suri/K-means-Clustering
sourabh-suri/Questor
Scan & Search text from hardcopy books and images! :book: :mag:
sourabh-suri/PlaceMentor
:mortar_board: PlaceMentor helps you to get information regarding Oncampus companies visit! Designed for Jamians.
sourabh-suri/Matrix-Multiplication-UpperTraingularization
sourabh-suri/Parallel-Integration
sourabh-suri/GPU-Matrix-Multiplication
sourabh-suri/Singleton-Class
How to use one instance of class for different several other classes?