altera-fpga
There are 72 repositories under altera-fpga topic.
drandyhaas/HaasoscopePro
Affordable 2 GHz 3.2 GS/s 12 bit open-source open-hardware expandable USB oscilloscope
ultraembedded/openlogicbit
Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.
mbtaylor1982/ReSDMAC
Verilog code to replace the Commodore SDMAC found in the A3000
robseb/HPS2FPGAmapping
SoCFPGA: Mapping HPS Peripherals, like I²C or CAN, over the FPGA fabric to FPGA I/O and using embedded Linux to control them (Intel Cyclone V)
Multimedia-Processing/Digital-Logic-Design
透過數位邏輯結合VHDL與Verilog的過程，作為從基礎數位邏輯到計算機系統結構，並實作出一顆CPU的教學書籍，希望未來可以成為教學範例檔案。目前將開發轉移到GitLab，因為可以呈現數學與MUL圖。
alvarezpj/single-cycle-cpu
VHDL implementation of a 1 Hz single cycle CPU that supports recursive function calls
MUDAL/Altera_FPGA_Projects
This repository contains numerous projects that were successfully implemented on an Altera Cyclone IV FPGA.
ThePituLegend/RISC-V_DE10-Nano
This project aims to boot Linux on a RocektChip based SoC, synthesised on the DE10-Nano board. Computer Science Bachelor's Thesis at UAB, Spain.
Davide-DD/mastermind
FPGA implementation of the popular logic game using VHDL and Altera DE1
atmughrabi/AccelGraph
Graph Processing Framework that supports || OpenMP || CAPI
mrLSD/fpga
Research & Development FPGA projects for different boards
rafafigueredoviana/RISCV_MCU_CYCLONEV
A basic implementation of the RISCV core into a DE10nano FPGA board.
XAli-SHX/Implementation-of-an-Edge-Detection-Filter-Using-the-Avalon-Interface
Implementation of an Edge Detection Filter Using the Avalon Interface
mateuspinto/FPGA_Verilog_Ballot_Box-TP2-ISL-UFV
Hardware description of a complete Ballot Box made in Verilog with implementation in FPGA-Altera-DE-2-155, made in Verilog with Quartus Prime in discipline ISL for computer science graduation.
HaochengBillYang/ece385
ECE385 @ UIUC FA22
lazyoracle/vhdl-processor
An 8-bit processor in VHDL based on a simple instruction set
lstolcman/bachelor-thesis
Thesis covers research on digital signal processing with software defined radio techniques applied in FPGA environment. It is written entirely in Polish language, except english abstract
Terminatorjjjjj/NTUEE-DCLAB-Materials
This repo is the lab materials for NTUEE DCLAB (http://dclab.ee.ntu.edu.tw).
arnaldojr/Robot-FPGA
Controle de motor DC + Sensores fim de curso implementado em VHDL para o kit DE0-CV utilizado na matéria de Elementos de sistemas do 3 semestre de Engenharia da computação do Insper.
chkrr00k/sram-controller
A simple sram controller and test for the altera DE1 FPGA board
EngineerMichael/ModelSim-Altera-Project-Electronics-
⎔ Using the program ModelSim-Altera, to execute a Synchronous Counter with Asynchronous and Synchronous Reset project by implementing a 2 Bit, 4 Bit, 6 Bit, and 11 Bit for counters by using VHDL code.
Jjateen/Snake-Game-Verilog
This repository showcases a Verilog-based Snake and Apple Game, developed for the ECL 106: Digital System Design with HDL course. Running on an Altera DE10-Lite FPGA board and displayed on a VGA monitor, players control a snake to collect apples while avoiding obstacles. The snake grows longer with each apple, making the game progressively harder.
MKme/fpga
FPGA and CPLD programming, tutorials and information I figure out.
mohamedtareq24/4_Channel_Logic_Analyzer
FPGA based Logic analyzer designed then FPGA implemented on ALTERA cyclone IV FPGA
nikolovjovan/FPGAParallelSorting
Altera Quartus project for Altera Cyclone III FPGA boards which uses one manager board and two worker boards to sort an array of numbers in parallel.
samdejong86/Arria-V-ADC-Ethernet
Transfers data from an ADC to a PC via ethernet
william-hazem/LASD
Laboratório de Arquitetura de Sistemas Digitais, ministrado pelo professor Rafael Bezerra Correia Lima. Foram desenvolvidos 8 requisitos de hardware, 1 requisito de software e 1 projeto de disciplina que totalizam 10 Sprints. A arquitetura de sistemas implementada é baseada em MIPS 8 bits, e desenvolvidos e testados na FGPA Ciclone II EP2C35F672C6
asankaSovis/Position_Detection
📌 The idea of this project is to build a system that uses the existing lights to detect the location of a user within an indoor environment. For this, we can use Visible Light Communication (VLC) technology. The basic concept is to have four LEDs transmitting their IDs one after the other at fixed intervals.
Chrisdeleon91/Altera-DE1-VGA-Interface
Integrated and programmed a VGA Interface using the Altera DE1 to output in synchronization with a custom programmed finite-state machine.
iancraz/EV21-Processor
Verilog RISC Processor Design
t4rcisio/Arquivos_Verilog
Processador nano-Risc, controlaor de display, e muito mais...
yvan674/Hardware-Praktikum
Hardware Praktikum at Uni Freiburg
briansune/Cyclone-V-SoC-ALSA-MUX
Cyclone V SoC ALSA MUX
DebbieMatt/FPGA_VHDL
Objetivo do Projeto Implementação de circuitos digitais em FPGA. Exemplos de lógica combinacional, sequencial e sistemas embarcados. Testes práticos com periféricos (LEDs, botões, displays, etc.).
mit41301/BeMicro_EP3C16F256C8
Altera Cyclone III based BeMicro stick uses EP3C16F256
TanumaHideki/ReLM-PoC
ReLM is the soft-core multiprocessor technology based on the unique memory architecture, enabling users to build a high-performance microcontroller on a relatively small FPGA board.