bluespec
There are 34 repositories under bluespec topic.
WangXuan95/BSV_Tutorial_cn
一篇全面的 Bluespec SystemVerilog (BSV) 中文教程，介绍了BSV的调度、FIFO数据流、多态等高级特性，展示了BSV相比于传统Verilog开发的优势。
cambridgehackers/connectal
Connectal is a framework for software-driven hardware development.
mit-plv/kami
A Platform for High-Level Parametric Hardware Specification and its Modular Verification
p4fpga/p4fpga
P4-14/16 Bluespec Compiler
thotypous/alterajtaguart
Altera JTAG UART wrapper for Bluespec
CTSRD-CHERI/RVBS
RISC-V BSV Specification
chipsalliance/OmnixtendEndpoint
Hardware implementation of an OmniXtend Memory Endpoint/Lowest Point of Coherence.
thoughtpolice/yosys-bluespec
Yosys plugin for synthesis of Bluespec code
Raamakrishnan/bsv-for-vscode
Bluespec System Verilog language extension for Visual Studio Code
cambridgehackers/bsvtokami
Translates Bluespec SystemVerilog to Kami for use with the coq proof assistant.
thotypous/simple-mips
Simple MIPS µC for educational purposes
jaytlang/risc-y
Six stage RISC-V processor supporting the RV32I instruction set
Sooryakiran/Domain-Specific-Hardware-Accelerator-VLSI-CAD-Project
Domain Specific Hardware Accelerators - VLSI CAD Project
thotypous/altsourceprobe
Altera JTAG Source/Probe wrapper for Bluespec
mchanphilly/vscode-bsv
Bluespec SystemVerilog extension for VS Code
pbing/J1_BSV
Forth CPU J1 in Bluespec SystemVerilog (BSV)
GnosGnas/Side-Channel-Analysis
Repository for various experiments done during Aug'21 to Mar'21 related to Side-channel-analysis of Shakti's AES accelerators
jsburke/rv-bitmanip
Implementation of proposed RISC-V xbitmanip instructions in BlueSpec
megabyde/bsv-listings
Bluespec SystemVerilog language definition for the LaTeX listings package
haohao022/bluespec-lab
北航高等计组实验
kammoh/bluelight
Hardware implementation of Lightweight Cryptography candidates in Bluespec SystemVerilog.
mhrtmnn/BSpartan
Collection of projects using Verilog and Bluespec on the Spartan Edge Accelerator FPGA Board
thotypous/keccak-bsv
Bluespec SystemVerilog implementation of the Keccak primitive (SHA-3)
DevJPM/BSV-Stuff
To toy around with Bluespec-SystemVerilog and my Basys3 board
johnmaxrin/AF754
A collection of activation functions implemented in Bluespec for integration with hardware designs, ensuring IEEE 754 compliance
jsburke/bsv-cores
RISC-V cores based on Bluespec's Piccolo and Flute
MarcosFagli/Redes_ImplementacaoTCPServer
Implementação do protocolo TCP para a disciplina de Redes de Computadores da Universidade Federal de São Carlos - UFSCar
thotypous/AcqSys
Low-cost modular acquisition and stimulation system for neuroscience
xushengj/BluespecSystemVerilog-NotepadPlusPlus
Bluespec System Verilog syntax highlighting for Notepad++
0xch4/blue-ice-breaker
Learning Bluespec on an iCEBreaker FPGA
hce/blueook
Ook!-interpreter in Bluespec System Verilog
Micky261/Notepad-Plus-Plus-BlueSpec-Verilog-Syntax-Highlighting
BlueSpec Verilog Syntax Highlighting for Notepad++
pbing/fsm_bsv
FSM coding styles in BSV
pbing/Wishbone_BSV
Wishbone/Bluespec Systemverilog Transactors