carry-save-adder
There are 7 repositories under carry-save-adder topic.
tharunchitipolu/Dadda-Multiplier-using-CSA
Dadda multiplier(8*8, 16*16, 32*32) in Verilog HDL.
neeraj1397/Performance-Analysis-of-Parallel-Prefix-Adders-Using-Zynq-7000-APSoC
Performed a comparative study of Parallel Prefix Adders using Verilog HDL on Zynq-7000 APSoC (PL) from XIlinx. Circuits are simulated, synthesized and implemented using Vivado Design Suite.
DoniaGameel/Verilog-adders-with-synthesis-using-Oasys
explore different implementations of adders and study their characteristics.
Amirreza81/Computer-Architecture
Computer Architecture - Practical Solution with Quartus - Sharif University of Technology
aliansgp/VHDL_Adders
Different adders code in VHDL and Comparison
FloHofstetter/M9-VLSI-Anwendungen
Summary of projects I did in VLSI desing.
gubbriaco/VHDL_scripts
Useful VHDL scripts for hardware description.