combinational-logic

hosseinfani/digital_odyssey

Materials for the Computer Science course, Digital Design (Logic Circuits)

hansinahuja/32-Bit-ALU

A 32-bit ALU using combinational logic written in Verilog.

AndreasKaratzas/circuit-simulation

This is a Combinational Circuit Logic Simulation Tool. There is a C++ version and a C version.

BaseMax/YourCombinationsJS

An efficient combinatorics library for JavaScript to generate and get the list of all Permutations and Combinations with the ability to enable or disable repetition. (utilizing ES2015 generators)

z1skgr/CalculatorVHDL

Design of the implementation of a calculator connected on the integrated FPGA

Jamboii/verilog-assignments

Source code for various Verilog-based projects and assignments

mcquerol/vhdl-projects

VHDL projects for combinational and sequential logic design on FPGA.

animeshk-me/circuit-paths-enumerator

This script lists out all paths from inputs to outputs of an input combinational circuit in the form of structural/gate-level modelling in verilog. The BFS graph algorithm is used.

BaseMax/AnalyzeCombine

Analyze the combine with and without the repetition. (SOON)

estepona/logic-circuit

simulation of essential combinational logic circuits with boolean algebra

hansinahuja/Digital-Logic-Design

Codes written by me in my Digital Logic Design course.

jchang12345/Morse-Code-Decoder-

EE89H Final Project

joeymaillette04/VHDL

VHDL implementations of half-adders, full-adders, and a 4-bit adder for digital circuit design

n4vrl0s3/Simple-Kotlin-Project

Simple Kotlin Project Using Kotlin Language

saibhargav1508/Basic-combinational-logic-VHDL

This repository contains synthesizable VHDL code for basic combinational logic circuits such as Adder with register, 2:4 decoder, 4:2 priority encoder, Multiplier with register and other circuits.

touunix/MUX-VHDL

MUX VHDL | Układ kombinacyjny VHDL

Yashraj-Aware/ADE-Assignments

These are the assignments of Second year Analog Digital Electronicd subject

2uger/verilog_uart_hw

Verilog UART implementation with Vivado build scripts to test loopback on Xilinx Arty board

Aathish04/ASCIIMorseCircuit

This repository contains the project files and report for an ASCII letter to Morse Code converter built using only basic sequential and combinational logic circuits.

aliaagheisX/Calculator-using-Logic-Gates

4 bit Calculator using Logic Gates

Arun44/From-Nand-To-Tetris

This Repo Contains Projects implemented for this Course:)

danielbboy111/CPEN-211

CPEN 211: Computing Systems I

danielbboy111/CPEN-311

CPEN 311: Digital Systems Design

ewdlop/Verilog-Notes

HDLBit-Pratice. https://hdlbits.01xz.net/wiki/Main_Page

rajenr/Computer-Architecture

Repository for chip documentation (CS220 SP 2018)

sriman-dutta/Kmap-solver

This project contains Java code to implement a Kmap solver, limited to 3 variables. On entering the truth table or minterms, it gives the minimal SOP form, using 3-variable K-map as the minimization technqiue.

vitorpbarbosa7/mit_6.004_computation_structures

MIT Course 6.004 - Computation Structures

ahmd-kamel/Single-Cycle-Miroprocessor_MIPS-ISA

Designing Single-Cycle Microprocessor without Interlocked Pipeline Stages (MIPS) using Verilog.

CFZRfrndVolt/Introducing-VHDL-

This repository contains projects and experiments focused on designing, simulating, and implementing digital circuits using VHDL (VHSIC Hardware Description Language) and Quartus II software. The projects covered in this repository serve as an introduction to key concepts in digital system design, including the creation of basic logic circuits, com

lucianobajr/Introduction-to-Logic-Systems-2P

Basic tools, methods and procedures to design combinational and sequential digital circuits and systems. Topics include number systems, Boolean algebra, logic minimization, circuit design, memory elements, and finite state machine design.

Mvrtn-design/TC---Diseno_VHDL_de_sistemas_combinacionales

Circuito combinacional con entrada de 4 bits (número sin signo en binario puro) y salida con un número de 4 bits, su valor es redondear la operación 4 x RAIZ CUADRADA(y) al entero más próximo. El circuito se diseña de diversas maneras, cada una con una descripción en VHDL como arquitectura de la entidad.

talhatallat/Electronics