delay-locked-loop

There are 2 repositories under delay-locked-loop topic.

  • Remote-HWA/SideLine_Zynq

    SideLine is a novel power side-channel vector based on delay-line components widely implemented in high-end SoC.

    Language:C8204

  • josephgravellier/sideline

    SideLine is a software-based power side-channel analysis vector. It uses delay-lines (located in SoC memory controllers) as power meters.

    Language:HTML0100