instruction-level-parallelism

There are 9 repositories under instruction-level-parallelism topic.

sdasgup3/parallel-processor-design
Super scalar Processor design
Language:Verilog21 1 03
SIMDE-ULL/SIMDE
Educational computer simulator on a mission to "superscale" the study of computer architecture fundamentals
Language:TypeScript13 4 8110
dominiksalvet/super-riscv
Superscalar dual-issue RISC-V processor
Language:SystemVerilog10 1 03
w-feng/CompArch-MIPS-POWER
Curriculum material for teaching computer architecture with MIPS and POWER
Language:Python6 4 02
CSpyridakis/Tomasulo
Introduction in Dynamic Instruction Scheduling (Advanced Computer Architecture) implementing Tomasulo's Algorithm
Language:VHDL4 2 01
sebastian-wardzinski/computer-architecture
ECE552: Computer Architecture — Fall 2020.
Language:C2 1 01
gocho1307/Labs-OC
Project for 2023/2024 - Computer Organization @ IST
Language:C1 2 00
scicomp-durham/comp3577-mimd-code
Examples of OpenMP for instruction-level parallelism.
Language:C0 3 00
sid-xyz/RNBIP_Pipelined-Microprocessor
Redesigned the RNBIP single-bus architecture to implement a 3 stage instruction-level pipeline.
Language:Verilog0 1 00