synopsys-vcs

There are 4 repositories under synopsys-vcs topic.

  • OpenEDF/verilog-basic

    learn the combinational and sequential logic circuit.

    Language:SystemVerilog17101

  • tatan432/AES_ENCODER

    RTL implementation for Advanced Encryption Standard (AES) in Verilog. Synthesis Done in Synopsys DC.

    Language:Verilog9101

  • vb000/vcs-slave-mode

    Example to control VCS simulation with a C/C++ program. This involves VCS output a shared object instead of an executable (simv).

    Language:Makefile5303

  • cong2738/May_team_project_I2C_SPI

    UVM based Verification of SPI_Protocol and I2C_Protoccol. A Serial intra System Communication Peripheral Protocol

    Language:VHDL