xsim

There are 4 repositories under xsim topic.

  • mzh330521/SublimeLinter-contrib-xsim

    Vivado Simulator (XSim) xvlog/xvhdl plugin for SublimeLinter. Linting for Verilog/SystemVerilog and VHDL.

    Language:Python9102
  • RipperJ/VerilogExpr2NAND-NOR

    Logic Expression Compiler, with Logic Minimization, to NAND/NOR Implementation

    Language:Python3100
  • htmos6/Swiss-Stopwatch

    Project is a high-precision chronometer using VHDL, intended for implementation on an FPGA. The chronometer is designed to operate with nanosecond (ns) precision and is capable of accurately measuring elapsed time in milliseconds, seconds, and minutes. The design has been tested using a VHDL test bench and verified with the XSim extensively.

    Language:VHDL0100
  • htmos6/Flex-PWM500

    The PWM (Pulse Width Modulation) Generator creates a PWM signal to control PWM-driven devices. It allows configurable clock and PWM frequencies via generics. The duty cycle, input as a 7-bit signal, adjusts the proportion of time the signal is high.

    Language:VHDL10