yongfu-li

yongfu-li's Stars

• SJTU-YONGFU-RESEARCH-GRP/MESD-MOSFET-Electrical-Simulation-Dataset

  MESD MOSFET Electrical Simulation Dataset

  Language:SourcePawn2

• academicpages/academicpages.github.io

  Github Pages template for academic personal websites, forked from mmistakes/minimal-mistakes

  Language:JavaScript11.9k42.5k

• biocas-conference/biocas-conference.github.io

  Language:HTML1

• seshadri-c/BioCas-2022-Challenge

  1

• Edward-Lou-THU/Lung_Sound_Classification_Algorithm

  This is our object for IEEE BioCAS 2022 The Grand Challenge of Respiratory Sound Classification Algorithm

  3

• chenzizhao/biocas-challenge-22

  Submission to IEEE BioCAS 2022 Grand challenge on Respiratory Sound Classification

  Language:Jupyter Notebook61

• SJTU-YONGFU-RESEARCH-GRP/CIRDC

  Comprehensive IEEE Research Data Collections (CIRDC)

  Language:Python9

• pulp-platform/common_cells

  Common SystemVerilog components

  Language:SystemVerilog499140

• bmurmann/COCOA

  COCOA: Collaborative Compendium on Analog Integrated Circuits

  Language:Python9

• isicas2025/isicas

  Language:HTML2

• StefanSchippers/xschem

  A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

  Language:C31521

• IHP-GmbH/IHP-Open-PDK

  130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design

  Language:HTML38158

• ARandomOWL/liberty-to-genlib

  Convert Synopsys Liberty fomat to SIS Genlib

  Language:Python5

• kiwih/qtcore-C1

  Language:Verilog424

• aviralpandey/CT-DS-ADC_generator

  A Continuous Time (CT) Delta Sigma (DS) ADC Generator

  Language:Python6

• dan-fritchman/Hdl21

  Hardware Description Library

  Language:Python6715

• mattvenn/multi_project_tools

  tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles

  Language:Python3414

• google/xls

  XLS: Accelerated HW Synthesis

  Language:C++1.2k174

• ncsu-eda/FreePDK3

  Language:Mathematica10933

• ChrisZonghaoLi/sky130_ldo_rl

  This repo contains the code that runs RL+GNN to optimize LDOs in SKY130 process.

  Language:Jupyter Notebook273

• ACMmodel/MOSFET_model

  A simple MOSFET model with only 5-DC-parameters for circuit simulation

  376

• laurentc2/SKY130_for_KLayout

  KLayout technology files for Skywater SKY130

  Language:Makefile3712

• KLayout/klayout

  KLayout Main Sources

  Language:C++779199

• chipsalliance/synlig

  SystemVerilog support for Yosys

  Language:Verilog15921

• pybind/pybind11

  Seamless operability between C++11 and Python

  Language:C++15.6k2.1k

• gdsfactory/gdsfactory

  python library to design chips (Photonics, Analog, Quantum, MEMs, ...), objects for 3D printing or PCBs.

  Language:Python504213

• google/skywater-pdk

  Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

  Language:Python3k388

• kiwa3927/PVconverter

  PVconverter is a language translation tool which can convert the commonly used physical verification programming languages to each other. The applicable PV languages include x SVRF, PVS, PVRS, etc.

  Language:C++132

• MLNLP-World/Paper-Writing-Tips

  MLNLP社区用来帮助大家避免论文投稿小错误的整理仓库。 Paper Writing Tips

  3.5k456

• RTimothyEdwards/open_pdks

  PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open processes.

  Language:Python27685