zavs/ercesiMIPS

Why I have an error saying that '=' expected but ';' found

Opened this issue · 3 comments

I have never use ';' in my code but the error says that ';' is found when '=' is expected
here is my code:
`//**************************************************************************
//--------------------------------------------------------------------------
// ercesiMIPS Single Cycle Processor Control path
//
// Junpeng
// version 0.1
//--------------------------------------------------------------------------
//**************************************************************************

package SingleCycle

import chisel3._
import chisel3.util._

class CtltoDatIo extends Bundle()
{
val nPC_MUX_sel = Output(Bool())
val RegWr = Output(Bool())
val RegDst = Output(Bool())
val funct = Output(UInr(5.W))
val Branch = Output(Bool())
val Jump = Output(Bool())
val ExtOp = Output(Bool())
val ALUctr = Output(UInt(2.W))
val ALUsrc = Output(Bool())
val MemtoReg = Output(Bool())
val Rd = Output(UInt(5.W))
val Rt = Output(UInt(5.W))
val Rs = Output(UInt(5.W))
val Imm16 = Output(UInt(16.W))
val Imm26 = Output(UInt(26.W))
}

class CPathIo extends Bundle()
{
val Inst = Input(UInt(32.W))
val boot = Input(Bool())
val MemWr = Output(Bool())
val MemRead = Output(Bool())
val valid = Output(Bool())
val ctl = new CtltoDatIo()
val dat = Flipped(new DatToCtlIo)
}

class CtlPath extends Module()
{
val io = IO(new CPathIo ())
// Add your code here. You can init all control signals first.
// Then decode these signals according to current instruction.
io.MemWr := 0.U
io.valid := 1.U
io.ctl.RegWr := false.B
val Instop := io.Inst(31,26)
io.ctl.Rs := io.Inst(25,21)
io.ctl.Rt := io.Inst(20,16)
io.ctl.Rd := io.Inst(15,11)
io.ctl.shamt := io.Inst(10,6)
val funct := io.Inst(5,0)
val io.ctl.Imm16 := io.Inst(15,0)
val io.ctl.Imm26 := io.Inst(25,0)

//decoder
when(Instop === B000000.U)//R-type
{
	io.ctl.ALUctr := B10.U
	io.ctl.Branch := false
	io.MemWr      := false
	io.MemRead    := false
	io.ctl.RegWr  := true
	io.ctl.MemtoReg := false
	io.ctl.ALUsrc := false
	io.ctl.RegDst := true
	io.ctl.funct  := funct
}.elsewhen(Instop === B100011.U)//lw
{
	io.ctl.ALUctr := B00.U
	io.ctl.Branch := false
	io.MemWr      := false
	io.MemRead    := true
	io.ctl.RegWr  := true
	io.ctl.MemtoReg := true
	io.ctl.ALUsrc := true
	io.ctl.RegDst := false
	//io.ctl.funct  := funct
}.elsewhen(Instop === 101011.B)//sw
{
	io.ctl.ALUctr := B00.U
	io.ctl.Branch := false
	io.MemWr      := true
	io.MemRead    := false
	io.ctl.RegWr  := false
	//io.ctl.MemtoReg := true
	io.ctl.ALUsrc := true
	//io.ctl.RegDst := false
	//io.ctl.funct  := funct
}
.elsewhen(Instop === B000010.U)//j
{
	io.ctl.Jump := true
	io.ctl.ALUctr := B11.U
}

}`
and the line 54,59,60,63 have this kind of error
I am mad at this error, somebody help!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!

zavs commented

Firstly, in these three lines.

val funct := io.Inst(5,0)
val io.ctl.Imm16 := io.Inst(15,0)
val io.ctl.Imm26 := io.Inst(25,0)

I guess they should be:

val funct = io.inst(5,0)
io.ctl.Imm16 := io.Inst(15,0)
io.ctl.Imm26 := io.Inst(25,0)

when(Instop === B000000.U) should be when(Instop === 0.U). And the same with other kind of undefined data type error, such as 'io.ctl.ALUctr := B10.U' should be 2.U or 10.B, etc.

zavs commented

By the way, could you please change the code author name in your comment.

Yes, and I found I forgot '.B' after each Boolean value