Target-specific AST post-processing
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The compiler works in several stages at the moment:
- lexing & parsing
- post-processing of the AST (e.g. concatenating sections)
- type-checking
- post-processing of the typed AST (simplifying some instructions)
- compiling the typed AST into opcodes
For now, post-processing the typed AST is the same for all platforms (which surely works, but introduces some performance drawbacks for some platforms).
As an example, consider this:
section data {
x: u64
4
}
section code {
main: forall (s: Ts). { %sp: sptr *{ %sp: sptr s }::s }
mov x, %r0
mov 0, %r1
unsafe {
mov %r1(%r0), %r0
}
ret
}
We can see that we are offsetting a register with another one.
On x64 (amd64), this is possible to do in one opcode (using the SIB byte). But this is not possible in MIPS, where you first have to load the address of x
, then add the content of the register to it, and then load the value at the address in the register.
Because of this, it would be a huge performance penalty for x64 to post-process the unsafe
instruction into a sequence of 3 to 4 instructions.
This stage has been moved to a target-specific codegen preprocessor. 🎉