This is a MultiCycle CPU Project based on MIPS Instruction Set.
42 Instructions supported. Check it at doc/Instructions.md
DO NOT SUPPORT interrupts and overflow.
For a more convenient test, I split the full test .asm file into 2 subsets: (1 to 3) and (4 to 5). I add a loop at the end of test .asm file (1 to 3).
Signals at doc/Signal.md
States at doc/State.md
The document was not fully updated during my developing, so it may not perfectly match my recent work. Take it easy, there were not too many changes.