3024hub

Pinned Repositories

ADeus
An open source AI wearable device that captures what you say and hear in the real world and then transcribes and stores it on your own server. You can then chat with Adeus using the app, and it will have all the right context about what you want to talk about - a truly personalized, personal AI.
Language:TypeScript00
aidea
AIdea 是一款支持 GPT 以及国产大语言模型通义千问、文心一言等，支持 Stable Diffusion 文生图、图生图、 SDXL1.0、超分辨率、图片上色的全能型 APP。
Language:Dart00
analog-generators
BAG scripts for analog design, simulation, and layout
Language:Python00
Analog-to-Digital-Converter
This repository presents the mixed signal design of a Counter Type/ Ramp Type ADC. The Digital part of the circuit i.e 4- bit counter is simulated on Makerchip tool. All the Simulations are done using Esim and Makerchip tool only. Since the counter used is taken to be 4-Bit, the input voltage that can be converted to analog is limited to 0-15V. A 4
Language:Verilog00
ibisami
A public domain IBIS-AMI model creation infrastructure for all to share.
Language:HTML0 0 00
MoneyPrinter
Automate Creation of YouTube Shorts using MoviePy.
Language:Python0 0 00
MoneyPrinterV2
Automate the process of making money online.
Language:Python00
openPCells
Parametric layout generator for digital, analog and mixed-signal integrated circuits
Language:C00
OpenROAD
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
Language:Verilog0 0 00
OpenROAD-flow-scripts
Language:Verilog00

3024hub's Repositories

3024hub/ADeus
An open source AI wearable device that captures what you say and hear in the real world and then transcribes and stores it on your own server. You can then chat with Adeus using the app, and it will have all the right context about what you want to talk about - a truly personalized, personal AI.
Language:TypeScript00
3024hub/aidea
AIdea 是一款支持 GPT 以及国产大语言模型通义千问、文心一言等，支持 Stable Diffusion 文生图、图生图、 SDXL1.0、超分辨率、图片上色的全能型 APP。
Language:Dart00
3024hub/analog-generators
BAG scripts for analog design, simulation, and layout
Language:Python00
3024hub/Analog-to-Digital-Converter
This repository presents the mixed signal design of a Counter Type/ Ramp Type ADC. The Digital part of the circuit i.e 4- bit counter is simulated on Makerchip tool. All the Simulations are done using Esim and Makerchip tool only. Since the counter used is taken to be 4-Bit, the input voltage that can be converted to analog is limited to 0-15V. A 4
Language:Verilog00
3024hub/ibisami
A public domain IBIS-AMI model creation infrastructure for all to share.
Language:HTML0 0 00
3024hub/MoneyPrinter
Automate Creation of YouTube Shorts using MoviePy.
Language:Python0 0 00
3024hub/MoneyPrinterV2
Automate the process of making money online.
Language:Python00
3024hub/openPCells
Parametric layout generator for digital, analog and mixed-signal integrated circuits
Language:C00
3024hub/OpenROAD
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
Language:Verilog0 0 00
3024hub/OpenROAD-flow-scripts
Language:Verilog00
3024hub/openroad_useful_scripts
Language:Tcl00
3024hub/python-for-office
Python办公自动化
Language:Python00
3024hub/python_excel_book
『Pythonでかなえる Excel作業効率化』のサポートページです。
Language:Jupyter Notebook0 0 00
3024hub/tpybis
Python based IBIS parser