A-suozhang/Fifo2AXI4
A Module To Read From Simple FIFO(with wr_en,rd_en), Give AXI4 Streaming Signal. Used For cases that DONOT Use AXI4Ffifo
Verilog
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A Module To Read From Simple FIFO(with wr_en,rd_en), Give AXI4 Streaming Signal. Used For cases that DONOT Use AXI4Ffifo
Verilog
No issues in this repository yet.