/SP-OS

Operating system for a RISC-V ISA

Primary LanguageCMIT LicenseMIT

SP-OS

Toy implementation of a workig OS for a Rv64I base ISA

The Os is tested in the QEMU simulator, that simulates RISC-V arch CPU.

Goals

  • Supports kernel thread
  • loading and running user programs
  • loading and running a file system
  • Virtual memory implementation

References