AlPrime2k1

NIELIT || Protocol || VLSI || Verification

Scaledge TechnologyBhubaneshwar

Pinned Repositories

AlPrime2k1
Profile Readme
0 1 00
APB-implementation-for-FPGA
This repository consists of all the related files for my B.Tech major project.
Language:Verilog1 1 00
Combinational-Logic-Circuits
Verilog fiiles for Arithmetic and Logic Combinational Circuits
Language:Verilog10
Finite-State-Machines
Latest addition to REPO : Folder with vending machine design and TB including code coverage report
Language:HTML2 1 00
Learning_CPP
Programs I created while learning C++
Language:C++0 1 00
Sequential-Logic-Circuits
Verilog design and testbench files for Flip Flop, Counters, RAM, FIFO, Shift Registers and other sequential logic circuits
Language:Verilog1 1 01
SystemVerilog
This repository consists of the files that i developed while learning SystemVerilog
Language:SystemVerilog00
UVM
Repository containing various UVM based programs.
Language:SystemVerilog00

AlPrime2k1/Finite-State-Machines
Latest addition to REPO : Folder with vending machine design and TB including code coverage report
Language:HTML2 1 00
AlPrime2k1/APB-implementation-for-FPGA
This repository consists of all the related files for my B.Tech major project.
Language:Verilog1 1 00
AlPrime2k1/Combinational-Logic-Circuits
Verilog fiiles for Arithmetic and Logic Combinational Circuits
Language:Verilog10
AlPrime2k1/Sequential-Logic-Circuits
Verilog design and testbench files for Flip Flop, Counters, RAM, FIFO, Shift Registers and other sequential logic circuits
Language:Verilog1 1 01
AlPrime2k1/AlPrime2k1
Profile Readme
0 1 00
AlPrime2k1/Learning_CPP
Programs I created while learning C++
Language:C++0 1 00
AlPrime2k1/SystemVerilog
This repository consists of the files that i developed while learning SystemVerilog
Language:SystemVerilog00
AlPrime2k1/UVM
Repository containing various UVM based programs.
Language:SystemVerilog00