Andrew-Hany

AUC_Catelog

This project was to create our designed AUC Catalog. It was divided into three phases; the first was to create the database design and the schema. The second phase was to scrape the original AUC catalog to collect the data we need and insert them into our database. The third phase was to create an API and a frontend to have a working website that shows our designed AUC catalog

cache-simulator

cmos_circuit_spice_generator

computer_architecture_lab

cpu_simulator

Drawing_App

it is a handwritten notes app that enables you take your notes and save what you have written into png image

FemtoRV32-Piplined-Processor

The project description of this project was the major project in the Computer Architecture course. It's a RISC-V processor and tested on Nexys A7 kit.

MachineLearnig_ByAndrewNg_coursera

risc_v_dissambler

This project is simply to convert binary(in Risc-v instruction-set architecture) to Risc-v assembly language

vivid_team

it is a website for education platform demo which is for competition.

Andrew-Hany/FemtoRV32-Piplined-Processor

The project description of this project was the major project in the Computer Architecture course. It's a RISC-V processor and tested on Nexys A7 kit.

Andrew-Hany/Drawing_App

it is a handwritten notes app that enables you take your notes and save what you have written into png image

Andrew-Hany/AUC_Catelog

This project was to create our designed AUC Catalog. It was divided into three phases; the first was to create the database design and the schema. The second phase was to scrape the original AUC catalog to collect the data we need and insert them into our database. The third phase was to create an API and a frontend to have a working website that shows our designed AUC catalog

Andrew-Hany/cache-simulator

Andrew-Hany/cmos_circuit_spice_generator

Andrew-Hany/computer_architecture_lab

Andrew-Hany/cpu_simulator

Andrew-Hany/MachineLearnig_ByAndrewNg_coursera

Andrew-Hany/risc_v_dissambler

This project is simply to convert binary(in Risc-v instruction-set architecture) to Risc-v assembly language

Andrew-Hany/vivid_team

it is a website for education platform demo which is for competition.

Andrew-Hany/DataStructure_algortihms

Andrew-Hany/IDS_Movies_Recommendation_System

Andrew-Hany/Image_Captioning

Andrew-Hany/IOS_Trip_App

Andrew-Hany/kmaps

Andrew-Hany/Library_internship

download executable:https://drive.google.com/u/0/uc?id=1u_vjq15_GSza5D2_fKTxm_pynWYucZBs&export=download

Andrew-Hany/Music_genra_Classification

Andrew-Hany/MyCart

my cart app

Andrew-Hany/MySql

Andrew-Hany/Operating-system-lab

This repo servers the Operating System lab.

Andrew-Hany/risc-v_problems

This repo for the assignments done for the assembly course. it contains some problems done in Risc-v assembly language including melody player

Andrew-Hany/Single-Cycle-Risc-V-Processor

Andrew-Hany/Smart_Lab_System

Wiki page for embedded course project

Andrew-Hany/Survivors_team

Andrew-Hany/TacoBell

Marketing project

Andrew-Hany/thanawy

Andrew-Hany/Thanawy_Marimena

This website was created for serving a religious education in my Church.

Andrew-Hany/To-Do-List

Todo app

Andrew-Hany/tomasulo_algorithm_simulation