ArronLam-502/GNN-ARCH
[ASAP 2020; FPGA 2020] Hardware architecture to accelerate GNNs (common IP modules for minibatch training and full batch inference)
Verilog
No issues in this repository yet.
[ASAP 2020; FPGA 2020] Hardware architecture to accelerate GNNs (common IP modules for minibatch training and full batch inference)
Verilog
No issues in this repository yet.