BJTULYF

Pinned Repositories

chisel-learning
Language:Scala00
exercise
用于日常练习保存代码
Language:C++01
Some-Notes
0 1 00
X-Core
an open source 32-bit RISC-V (RV32IM) MCU for Perf-V FPGA Board
Language:Verilog10

BJTULYF's Repositories

BJTULYF/X-Core
an open source 32-bit RISC-V (RV32IM) MCU for Perf-V FPGA Board
Language:Verilog10
BJTULYF/chisel-learning
Language:Scala00
BJTULYF/exercise
用于日常练习保存代码
Language:C++01
BJTULYF/Some-Notes
0 1 00