BlandoL

BlandoL's Stars

• cjhonlyone/NandFlashController

  AXI Interface Nand Flash Controller (Sync mode)

  Language:Verilog8237

• stffrdhrn/sdram-controller

  Verilog SDRAM memory controller

  Language:Verilog31195

• jmahler/mips-cpu

  MIPS CPU implemented in Verilog

  Language:Verilog579185

• hhping/LDPC_en-decoder

  LDPC编码解码matlab代码和Verilog代码及资料

  Language:Matlab4212

• zach0zhang/Single_instruction_cycle_OpenMIPS

  通过学习《自己动手写CPU》，将书中实现的兼容MIPS32指令集架构的处理器——OpenMIPS（五级流水线结构），简化成单指令周期实现的处理器

  Language:Verilog19145

• liangkangnan/tinyriscv

  A very simple and easy to understand RISC-V core.

  Language:C1.1k189

• ElectronAsh/Jaguar_MiSTer_master

  Atari Jaguar core by Torlus. WIP port to the DE10 Nano / MiSTer platform.

  Language:C++223

• VerticalResearchGroup/miaow

  An open source GPU based off of the AMD Southern Islands ISA.

  Language:Verilog1.1k237

• darklife/darkriscv

  opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

  Language:Verilog2.1k287

• SI-RISCV/e200_opensource

  Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2

  Language:Verilog2.6k1k

• lnis-uofu/FreePDK45-RRAM-Addon

  A RRAM addon for the NCSU FreePDK 45nm

  Language:HTML205

• lowRISC/opentitan

  OpenTitan: Open source silicon root of trust

  Language:SystemVerilog2.6k781

• KastnerRG/riffa

  The RIFFA development repository

  Language:Verilog778315

• BitOpenFPGA/arl

  lists of most popular repositories for most favoured programming languages (according to StackOverflow)

  7522

• XUANTIE-RV/wujian100_open

  IC design and development should be faster，simpler and more reliable

  Language:Verilog1.9k573

• ljgibbslf/SM3_core

  Language:Verilog14245

• open-sdr/openwifi

  open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

  Language:C3.9k659

• pConst/basic_verilog

  Must-have verilog systemverilog modules

  Language:Verilog1.7k380

• analogdevicesinc/hdl

  HDL libraries and projects

  Language:Verilog1.5k1.5k

• jbush001/NyuziProcessor

  GPGPU microprocessor architecture

  Language:C2k354

• alexforencich/verilog-ethernet

  Verilog Ethernet components for FPGA implementation

  Language:Verilog2.3k707

• microsoft/PowerToys

  Windows system utilities to maximize productivity

  Language:C#112k6.6k

• Vextil/Wwise-Unpacker

  Unpack game audio Wwise files (pck, bnk)

  Language:Batchfile647110

• 996icu/996.ICU

  Repo for counting stars and contributing. Press F to pay respect to glorious developers.

  270k21.1k