Collection of IP cores. FPGA cores written for fun and random project ideas.
- Uart Core: Simple UART with focus on small footprint and efficiency (designed for Cyclone-4)
- Sobel Core: 3x3 FIR filter used for detecting edges in image (designed for Zynq)
- Single Pulse: Generate single clock pulse
- Seven Seg: driver for 7-seg display
- Line buffer: FIFO like buffer for buffering single line of image
- Image generator: Convert JPEG image into .coe file. Used for generating test image generator
- SPI core: Simple SPI core (designed for Cyclone-4)
- SD-ram: Simple DRAM HW core (designed for Cyclone-4)
- ESP: work in progress (connect FPGA with ESP32)