Papers, videos, textbooks, documentation, and anything else that I find useful for VLSI folks. The first section lists general resources, the second is details about specific problems and implementations.
Essentially, anything to get you to see this more often:
_ _
* *
|
\___/
Ben Eater
High-level digital design information, along with use of old CPUs
https://www.youtube.com/@BenEater
Sam Zeloof
DIY Photolithography and at-home basic silicon chip manufacturing
https://www.youtube.com/@SamZeloof
TechTechPotato
General discussion about the industry and end products
https://www.youtube.com/@TechTechPotato
Analog Layout & Design
Lectures about various aspects of analogue IC design and layout
https://www.youtube.com/channel/UCBVINEwQ_dba3FaatbXVAug
Jin-Lien Lin
RISC-V
https://www.youtube.com/@jinl2
IEEE Open Journal of the Solid-State Circuits Society
Open-Access IEEE Journal related to IC design
https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=8782712
Cliff Cummings/Sunburst Design
Tons of super helpful papers that explain SystemVerilog coding practices
http://www.sunburst-design.com/papers/
Personal recommendation: Finite State Machine (FSM) Deisgn & Synthesis using SystemVerilog
Stuart Sutherland
Great papers on verification, asserts, etc
https://sutherland-hdl.com/papers.html
Personal recommendation: Who Put Assertions In My RTL Code? And Why?
Chips and Cheese
Highly detailed articles, often about modern CPU and GPU architectures and their performance characteristics
https://chipsandcheese.com/
Ken Shirriff's Blog
Articles mostly about early CPUs and other ICs
https://www.righto.com/
OpenTapeOut - November 2021
Day 1 VOD: https://www.youtube.com/watch?v=wvPZREaP7E0
Day 2 VOD: https://www.youtube.com/watch?v=sunruF6ryso
Flip-Flop coding guidelines
https://docs.xilinx.com/r/en-US/ug901-vivado-synthesis/Flip-Flops-and-Registers-Control-Signals
General IO Documentation (pdf)
https://docs.xilinx.com/api/khub/documents/IbGcnPFe6eF19RHma_Y~IA/content?Ft-Calling-App=ft%2Fturnkey-portal&Ft-Calling-App-Version=3.11.45&filename=ug471_7Series_SelectIO.pdf
SerDes IO Documentation (pdf)
Check with specific datasheet to see if it is applicable, Does not apply to Spartan 7 devices
https://docs.xilinx.com/api/khub/documents/SgVweevU5cLv0LyXoCVoPg/content?Ft-Calling-App=ft%2Fturnkey-portal&Ft-Calling-App-Version=3.11.41&filename=ug476_7Series_Transceivers.pdf
https://docs.xilinx.com/v/u/en-US/xapp1294-4x-oversampling-async-dru
https://ieeexplore.ieee.org/document/5657866
https://past.date-conference.com/proceedings-archive/2010/DATE10/PDFFILES/IP2_04.PDF
Quite possibly the most interesting paper I've ever read
https://github.com/CaiB/VLSI-Resources/blob/main/Papers/10.1.1.50.9691.pdf
V6
https://github.com/CaiB/GDStoSVG/blob/master/References/GDS_II_Stream_Format_Manual_6.0_Feb87.pdf
V7
https://github.com/CaiB/GDStoSVG/blob/master/References/GDSII%20v7%20Specification.PDF
Almost the same as V6, just with some limitations removed:
- polygons can have more than 200 points
- more than 64 layers and datatypes are supported
- more than 10 levels of hierarchy are supported
Mostly software-focused, but also with explanations of the format standard and some hardware information
http://www.mp3-tech.org/
Setup of constraints and analysis in Intel Quartus
https://github.com/CaiB/VLSI-Resources/blob/main/Documentation/mnl_timequest_cookbook-683081-666281.pdf
Originally downloaded from https://cdrdv2-public.intel.com/666281/mnl_timequest_cookbook-683081-666281.pdf