Quartus Prime is a software suite for compiling Verilog and VHDL for Altera (now part of Intel) devices. Unfortunately, most scripts for automating compilation and interaction are written in Tcl, and no one wants that.
This project aims to allow interaction with the quartus libraries via python.
Download and install Quartus Prime. Add C:\altera_lite\15.1\quartus\bin64 to the system %PATH%.
Then clone this repo and run the command:
python setup.py install