Pinned Repositories
chisel_book
logisim
logisim数码管输出设计
verilog
Chen-gz233's Repositories
Chen-gz233/chisel_book
Chen-gz233/logisim
logisim数码管输出设计
Chen-gz233/verilog
Chen-gz233/Bitlet-CLike
Chen-gz233/Bitlet-Int8
A bit-level sparsity-awared multiply-accumulate process element in HDL.
Chen-gz233/RV32I_cpu
使用chisel语言简单实现一个RV32I处理器