A hardware multiplier of the universal number (Unum) designed by John L. Gustafson. It is an multiplier of 32-bit Universal number(unum)-Type III with 3-bit exponent bit in pipeline structure. Universal number(unum)-Type III is described in the document in http://superfri.org/superfri/article/view/137/232. The LZC (leading zero counter) module based on papaer MODULAR DESIGN OF FAST LEADING ZEROS COUNTING CIRCUIT (http://iris.elf.stuba.sk/JEEEC/data/pdf/6_115-05.pdf) is used. The flow chart of this adder is in file: flow chart.doc
ChenJianyunp/Unum_32bit_3_multiplier
A hardware multiplier of the universal number (Unum) type-III
Verilog