/pll2022

Implementation of a Sub-Sampling PLL targeting SerDes Applications in SKYWATER PDK 130nm process

Primary LanguageVerilog

pll2022

Implementation of a Sub-Sampling PLL targeting SerDes Applications


Submission(s) for precheck - 31.08.2022:

folder "PICO Contest" includes Pin List as well as "pin dummy"(dummy project but with all the correct pins)