Deng-Xin

Major in EE.

Beijing Institute of TechnologyBeijing,China

Pinned Repositories

C-learn-test
Some tests to learn C.
Language:C00
Complexity-analysis-of-VVC-encoding-and-decoding
This page contains supplementary material for our paper entitled "COMPLEXITY ANALYSIS OF NEXT-GENERATION VVC ENCODING AND DECODING"
00
FastInterCU-VVC
Official implementation of "Deep Neural Network-based Fast Inter CU Splitting Algorithm for Versatile Video Coding (VVC) Standard"
Language:C++00
gitlearn
how to use git.
00
hello-world
This is my first repository to learn how to use github.
00
network_programming
在Linux下的网络编程demo，C语言实现了多进程和多线程的并发服务器案例，client-server demo
Language:C00
video_codec_learn
关于视频编解码学习资料
Language:Python00
VVC-CU-TU-partition-visualization
Visualize VVC(VTM) CU/TU partition
Language:Jupyter Notebook00
VVCSoftware_VTM-master
VTM14-COMMENT
Language:C++00
WzSerialPort
Windows、Linux的C++串口库，原生API封装
Language:C++00

Deng-Xin/C-learn-test
Some tests to learn C.
Language:C00
Deng-Xin/Complexity-analysis-of-VVC-encoding-and-decoding
This page contains supplementary material for our paper entitled "COMPLEXITY ANALYSIS OF NEXT-GENERATION VVC ENCODING AND DECODING"
00
Deng-Xin/FastInterCU-VVC
Official implementation of "Deep Neural Network-based Fast Inter CU Splitting Algorithm for Versatile Video Coding (VVC) Standard"
Language:C++00
Deng-Xin/gitlearn
how to use git.
00
Deng-Xin/hello-world
This is my first repository to learn how to use github.
00
Deng-Xin/network_programming
在Linux下的网络编程demo，C语言实现了多进程和多线程的并发服务器案例，client-server demo
Language:C00
Deng-Xin/video_codec_learn
关于视频编解码学习资料
Language:Python00
Deng-Xin/VVC-CU-TU-partition-visualization
Visualize VVC(VTM) CU/TU partition
Language:Jupyter Notebook00
Deng-Xin/VVCSoftware_VTM-master
VTM14-COMMENT
Language:C++00
Deng-Xin/WzSerialPort
Windows、Linux的C++串口库，原生API封装
Language:C++00
Deng-Xin/xilinx_axidma
A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communication between the processing system and FPGA programmable logic fabric, through one of the DMA ports on the Zynq processing system. Distributed under the MIT License.