Devansh0210

Devansh0210's Stars

• IntelLabs/pycaliper

  PyCaliper is Python-based tooling infrastructure that allows the verification and synthesis of specifications (properties) for RTL (e.g., Verilog, SystemVerilog)

  Language:Python10

• Learning-Chips-Lab/OpenEye

  The Open Source Hardware Accelerator for Efficient Neural Network Inference

  Language:Python426

• dotintent/awesome-ble

  A collaborative list of Awesome Bluetooth Low Energy (BLE) resources. Feel free to contribute!

  714

• ucb-bar/saturn-vectors

  Chisel RISC-V Vector 1.0 Implementation

  Language:Assembly453

• fulldecent/system-bus-radio

  Transmits AM radio on computers without radio transmitting hardware.

  Language:C6.4k396

• AngeloJacobo/UberDDR3

  Opensource DDR3 Controller

  Language:Verilog19331

• echasnovski/mini.nvim

  Library of 40+ independent Lua modules improving overall Neovim (version 0.8 and higher) experience with minimal effort

  Language:Lua5.2k187

• adam-maj/tiny-gpu

  A minimal GPU design in Verilog to learn how GPUs work from the ground up

  Language:SystemVerilog7k528

• fischermoseley/manta

  A configurable and approachable tool for FPGA debugging and rapid prototyping.

  Language:Python1099

• tinygrad/tinygrad

  You like pytorch? You like micrograd? You love tinygrad! ❤️

  Language:Python26.6k2.9k

• GlasgowEmbedded/glasgow

  Scots Army Knife for electronics

  Language:Python1.9k182

• pulp-platform/axi

  AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

  Language:SystemVerilog1.1k261

• penrose/penrose

  Create beautiful diagrams just by typing notation in plain text.

  Language:TypeScript7.5k348

• pulp-platform/pulp

  This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.

  Language:SystemVerilog446115

• mimseyedi/pysentation

  pysentation is a CLI for displaying Python presentations.

  Language:Python2514

• stevearc/oil.nvim

  Neovim file explorer: edit your filesystem like a buffer

  Language:Lua3.9k116

• tapparelj/gr-lora_sdr

  This is the fully-functional GNU Radio software-defined radio (SDR) implementation of a LoRa transceiver with all the necessary receiver components to operate correctly even at very low SNRs. This work has been conducted at the Telecommunication Circuits Laboratory, EPFL.

  Language:C++67170

• amaranth-lang/weekly

  Weekly newsletter featuring progress in Amaranth HDL, its standard components, and the community

  9

• theicfire/makefiletutorial

  Learn make by example

  Language:SCSS4.9k251

• openhwgroup/cvw

  CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.

  Language:SystemVerilog257183

• katef/libfsm

  DFA regular expression library & friends

  Language:C93552

• typst/typst

  A new markup-based typesetting system that is powerful and easy to learn.

  Language:Rust34.4k916

• tldraw/tldraw

  whiteboard / infinite canvas SDK

  Language:TypeScript35.6k2.2k

• jopohl/urh

  Universal Radio Hacker: Investigate Wireless Protocols Like A Boss

  Language:Python10.9k868

• mph-/lcapy

  Lcapy is a Python package for symbolic linear circuit analysis and signal processing. It uses SymPy for symbolic mathematics.

  Language:Python24446

• aumouvantsillage/guillaume.baierouge.fr

  Sources of my personal website

  Language:Less2

• russhughes/st7789py_mpy

  Driver for 320x240, 240x240, 135x240 and 128x128 ST7789 displays written in MicroPython

  Language:Python15458

• F5OEO/rpitx

  RF transmitter for Raspberry Pi

  Language:C4k531

• rishav-singh-0/my-linux-config

  These are some of the configurations i use in linux, feel free to make it your own.

  Language:Lua32

• Krupa0409/Anomaly-Detection-using-GANs

  Language:Python1