Design-for-Excellence Lab
We are a research team in NYU Abu Dhabi, whose main focus is the reliability and security of electronic chips.
Abu Dhabi, UAE
Pinned Repositories
2.5D_ROT
The HDL framework for our 2.5D root of trust.
CCS17
This is a platform for launching SAT (and similar) attacks on our SFLL netlists.
Corblivar
Corblivar is a simulated-annealing-based floorplanning suite for 3D ICs
GNN-RE
GNN-RE datasets for circuit recognition
GNN4IC
Must-read papers on Graph Neural Networks (GNNs) for Integrated Circuits (ICs) design, security and reliability. This collection of papers is summarized in the following survey paper; L. Alrahis et al. "Graph Neural Networks: A Powerful and Versatile Tool for Advancing Design, Reliability, and Security of ICs," ASP-DAC, 2023.
GNNUnlock
LLM4IC
LLMs and the Future of Chip Design: Unveiling Security Risks and Building Trust
OMLA
PSAT
This is a probabilistic SAT attack tool.
TrojanSAINT
TrojanSAINT: Gate-Level Netlist Sampling-Based Inductive Learning for Hardware Trojan Detection
Design-for-Excellence Lab's Repositories
DfX-NYUAD/GNN4IC
Must-read papers on Graph Neural Networks (GNNs) for Integrated Circuits (ICs) design, security and reliability. This collection of papers is summarized in the following survey paper; L. Alrahis et al. "Graph Neural Networks: A Powerful and Versatile Tool for Advancing Design, Reliability, and Security of ICs," ASP-DAC, 2023.
DfX-NYUAD/GNN-RE
GNN-RE datasets for circuit recognition
DfX-NYUAD/Corblivar
Corblivar is a simulated-annealing-based floorplanning suite for 3D ICs
DfX-NYUAD/LLM4IC
LLMs and the Future of Chip Design: Unveiling Security Risks and Building Trust
DfX-NYUAD/GNNUnlock
DfX-NYUAD/PSAT
This is a probabilistic SAT attack tool.
DfX-NYUAD/TrojanSAINT
TrojanSAINT: Gate-Level Netlist Sampling-Based Inductive Learning for Hardware Trojan Detection
DfX-NYUAD/OMLA
DfX-NYUAD/2.5D_ROT
The HDL framework for our 2.5D root of trust.
DfX-NYUAD/Breaking_CAS-Lock
DfX-NYUAD/MaliGNNoma
GNN-Based Malicious Circuit Classifier for Secure Cloud FPGAs- HOST24
DfX-NYUAD/UNSAIL
DfX-NYUAD/resynthesis_attack
Scripts and other material related to the resynthesis-based attack strategy against logic locking
DfX-NYUAD/DEFense
Security Closure at Physical Design
DfX-NYUAD/GNN4CIRCUITS
DfX-NYUAD/Trojan-Insertion-versus-Layout-Defenses
Benchmarking framework for ISPD'23 contest and TCHES'25 paper.
DfX-NYUAD/CPA
Correlation power attack
DfX-NYUAD/Fa-SAT
DfX-NYUAD/PoisonedGNN
The source code of PoisonedGNN and associated datasets. A backdoor attack on GNN-based hardware security systems
DfX-NYUAD/3D-SM-Attack
Proximity Attack for 3D ICs with Obfuscated F2F Mappings
DfX-NYUAD/Concerted_WL
DfX-NYUAD/GraphSAINT
[ICLR 2020; IPDPS 2019] Fast and accurate minibatch training for deep GNNs and large graphs (GraphSAINT: Graph Sampling Based Inductive Learning Method).
DfX-NYUAD/peo-PUF
The security evaluation framework for peo-PUF, short for plasmonics-enhanced optical PUF (physically unclonable function).
DfX-NYUAD/Poor-Man-s-Split-Manufacturing
Flow for locking of FEOL, lifting of key-nets, and package-level routing for unlocking at BEOL/RDL. Enables formally secure IP protection without splitting at all.
DfX-NYUAD/randomize_netlist
DfX-NYUAD/RTL-Breaker
DfX-NYUAD/split-extract
Heterogeneous Feature Extraction for Split Manufactured Layouts with Routing Perturbation
DfX-NYUAD/SplitLock
DfX-NYUAD/Titan
DfX-NYUAD/X-Volt
Joint Tuning of Driver Strengths and Supply Voltages Against Power Side-Channel Attacks [ISPD'23]: CAD and CPA Frameworks, and Experimental Artifacts