This is a very minimal UART interface that talks via the LPC bus. Good enough to provide a Coreboot or SerialICE console on a laptop without a real UART.
Proven on an Altera EPM240T100 evaluation board, occupying 83% of the CLPD chip:
Total logic elements: 199 / 240 (83 %)
Perhaps could be improved by someone who is proficient with Verilog. Contributions welcome!
- device.v - The toplevel device
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Glues a transmitter part, a receiver part and a LPC bus interface.
- lpc.v - LPC interface module
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Hardwired to 0x03fx address range (see inline comments), implementing just the few bits in the status register and the data I/O.
- uart_rx.v - UART receiver
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Hardwired to 115200 8-N-1 with 33 MHz clock source (see inline comments).
- uart_tx.v - UART transmitter
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Hardwired to 115200 8-N-1 with 33 MHz clock source (see inline comments).