This is a cycle accurate model of the 65C02 chip. This model is produced with the support of the ChipLab, which provides cycle-by-cycle traces of all external busses while executing programs on a real chip.
The 6502 chiplab, used for collecting traces of real chip execution, is available at: https://chiplab.emulationonline.com/6502/
Contributions welcome! If you would like to improve the model, a good workflow is
- Find something that isn't working. See the roadmap or join our Discord.
- Write a 6502 program that demonstrates desired behavior
- Run the program on the lab, and collect the signed trace.
- Add the trace to this repo as a test case, which should fail.
- Implement the desired functionality.
For an example of adding an instruction, Nop and Jump are a simple example, while basic loads and stores needed adding some more flexible uops and was thus more involved.
The list below gives an idea of what is currently supported. Unchecked boxes are planned but not yet complete.
- All official instructions are implemented (sans flags)
- Flags are added to official instructions
- NMI interrupt is implemented
- IRQ interrupt is implemented
- Unofficial instructions are implemented, + flags
We coordinate development discussion on Discord. https://discord.gg/uwx87FAYMu