In this repository, projects related to the Digital Logic Design course laboratory at the University of Tehran have been implemented.
University of Tehran
College of Engineering
School of Electrical & Computer Engineering
Digital Logic Laboratory, ECE 045
Experiment 1 (Sessions 1, 2) Clock and Periodic Signal Generation
Experiment 2 (Sessions 3, 4) Sequential Synthesis and FPGA Device Programming
Experiment 3 (Sessions 5, 6, 7) Function Generator
Experiment 4 (Sessions 8, 9) Accelerator and Wrappers