Gaveroid

Pinned Repositories

ROLN
Rowan Optics Lidar Neuromorphics project, some code snippets.
Language:Python10
ECE09243-FinalProject
The final project for Intro to Embedded Systems in fall 2022. A flood/leak detector by Gavin Trutzenbach, Dillon Withers and Brandon Tibbitt.
Language:Batchfile00
ECE09243-Lab2-FSM
Language:Verilog00
ECE09243-Lab3
Lab 3 for ECE09243, 32x32 register in Verilog. Written by Gavin Trutzenbach, Jesselyn Ablett, Manas Gupta.
Language:Verilog00
ECE09243-Lab4
Lab 4 for ECE09243, a RISC-V arithmetic logic unit (ALU) in Verilog. Written by Gavin Trutzenbach, Jesselyn Ablett, Manas Gupta.
Language:Verilog00
ECE09243-Lab5
Lab 5 for ECE09243, a 256x32 RAM module. Written by Gavin Trutzenbach, Jesselyn Ablett, Manas Gupta.
Language:Verilog00
ECE09243-Lab6
Lab 6 for ECE09243, a ROM module. Written by Gavin Trutzenbach, Jesselyn Ablett, Manas Gupta.
Language:Verilog00
ECE09243-Lab7
Lab 7 for ECE09243, a program counter and instruction decoder. Written by Gavin Trutzenbach, Jesselyn Ablett, Manas Gupta.
Language:Verilog00
ECE09243-Lab8
Lab 8 for ECE09243, a RISC-V datapath. Written by Gavin Trutzenbach, Jesselyn Ablett, Manas Gupta.
Language:Verilog00
ECE09243-Lab9
Lab 9 for ECE09243, a RISC-V control unit. Written by Gavin Trutzenbach, Jesselyn Ablett, Manas Gupta.
Language:Verilog00

Gaveroid's Repositories

Gaveroid/ROLN
Rowan Optics Lidar Neuromorphics project, some code snippets.
Language:Python1
Gaveroid/ECE09243-FinalProject
The final project for Intro to Embedded Systems in fall 2022. A flood/leak detector by Gavin Trutzenbach, Dillon Withers and Brandon Tibbitt.
Language:Batchfile
Gaveroid/ECE09342-Lab4
Lab 4 for Intro to Embedded Systems, ECE09342
Language:C
Gaveroid/ECE09342-Lab2
Lab 4 for ECE09342, a series of C and assembly programs written for the TI MSP430
Language:Assembly
Gaveroid/ECE09243-RISC-V_32_Processor
Final project for ECE09243, a RISC-V 32-bit processor. Written by Gavin Trutzenbach, Jesselyn Ablett, Manas Gupta.
Language:Verilog
Gaveroid/ECE09243-Lab9
Lab 9 for ECE09243, a RISC-V control unit. Written by Gavin Trutzenbach, Jesselyn Ablett, Manas Gupta.
Language:Verilog
Gaveroid/ECE09243-Lab8
Lab 8 for ECE09243, a RISC-V datapath. Written by Gavin Trutzenbach, Jesselyn Ablett, Manas Gupta.
Language:Verilog
Gaveroid/ECE09243-Lab7
Lab 7 for ECE09243, a program counter and instruction decoder. Written by Gavin Trutzenbach, Jesselyn Ablett, Manas Gupta.
Language:Verilog
Gaveroid/ECE09243-Lab6
Lab 6 for ECE09243, a ROM module. Written by Gavin Trutzenbach, Jesselyn Ablett, Manas Gupta.
Language:Verilog
Gaveroid/ECE09243-Lab5
Lab 5 for ECE09243, a 256x32 RAM module. Written by Gavin Trutzenbach, Jesselyn Ablett, Manas Gupta.
Language:Verilog
Gaveroid/ECE09243-Lab3
Lab 3 for ECE09243, 32x32 register in Verilog. Written by Gavin Trutzenbach, Jesselyn Ablett, Manas Gupta.
Language:Verilog
Gaveroid/ECE09243-Lab4
Lab 4 for ECE09243, a RISC-V arithmetic logic unit (ALU) in Verilog. Written by Gavin Trutzenbach, Jesselyn Ablett, Manas Gupta.
Language:Verilog
Gaveroid/ECE09243-Lab2-FSM
Language:Verilog