Pinned Repositories
CMOS-Circuit-Design-and-SPICE-Simulation-using-SKY130-Technology
Understanding CMOS circuit design and spice simulation is the root of a VLSI beginner . Here the detail study and spice implemantation of the CMOS inverter by VLSI system design is jotted down.
magic
Magic VLSI Layout Tool
openlane
OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.
OpenROAD-asap7-design-contest
OpenROAD-flow-scripts
OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/
PLL-IC-design-using-Open-Source-PDK-Google-Skywater-130nm
This repository in a walk through the entire process of PLL IC designing from the tools to the final tapeout.
RISC-V-Myth-workshop
A join venture of VSD corp. pvt. ltd. and Redwood EDA in the form of 5 day RISC-V Myth ( Microprocessor for you in thirty hours) workshop, making learning easily accessible for participant across all time zones.
TCL-programming
VSD-IAT-openLANE-workshop
A workshop on - Advanced Physical Design using OpenLANE/Sky130
vsdpcvrd
Geetima2021's Repositories
Geetima2021/PLL-IC-design-using-Open-Source-PDK-Google-Skywater-130nm
This repository in a walk through the entire process of PLL IC designing from the tools to the final tapeout.
Geetima2021/TCL-programming
Geetima2021/vsdpcvrd
Geetima2021/CMOS-Circuit-Design-and-SPICE-Simulation-using-SKY130-Technology
Understanding CMOS circuit design and spice simulation is the root of a VLSI beginner . Here the detail study and spice implemantation of the CMOS inverter by VLSI system design is jotted down.
Geetima2021/RISC-V-Myth-workshop
A join venture of VSD corp. pvt. ltd. and Redwood EDA in the form of 5 day RISC-V Myth ( Microprocessor for you in thirty hours) workshop, making learning easily accessible for participant across all time zones.
Geetima2021/VSD-IAT-openLANE-workshop
A workshop on - Advanced Physical Design using OpenLANE/Sky130
Geetima2021/magic
Magic VLSI Layout Tool
Geetima2021/openlane
OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.
Geetima2021/OpenROAD-asap7-design-contest
Geetima2021/OpenROAD-flow-scripts
OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/
Geetima2021/risc-v-core
This project was done as a part of RISC-V based MYTH (Microprocessor for you in Thirty Hours) workshop organized by Kunal Ghosh and Steve Hoover
Geetima2021/Verilog